The present disclosure relates to the field of flat panel display technology, and more particularly to an LTPS type TFT and a method for manufacturing the same.
Low temperature polysilicon (LTPS) has advantage of high electron mobility, which effectively helps reduce an area of a thin film transistor (TFT), and thus increases pixel aperture ratio of display panels. Brightness of display panels is increased, while power consumption of panels is reduced. This is helpful in decreasing manufacturing costs of panels as well. Therefore, LTPS and method for manufacturing the same have become one of the mainstream techniques used for field of liquid crystal display.
However, conventional methods for manufacturing LTPS are complicated. There are as many as ten or more film layers formed on an array substrate. Many mask processes are needed to form these films. This not only prolongs display panel manufacturing time, but also results in high manufacturing cost and high operation cost for formation thereof.
For this reason, panel manufacturers endeavor to shorten array substrate manufacturing periods, increase product manufacturing yields, increase product manufacturing efficiency, and decrease product manufacturing costs.
In the prior art, TFT generally includes a metal layer. Using a mask to form a through-hole is required in order to make electrical connection between the metal layer and a polysilicon layer, and using another mask to form another through-hole is also required in order to make electrical connection between the metal layer and a pixel electrode. Thus, according to the prior art, many masks are required to achieve electrical connection among layers in the manufacturing process of LTPS type TFT. The subject invention provides a technical scheme to solve this problem.